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ca13734bf0
Add kernel (Cortex-M0/M3/M4, Tricore, S32K, RISC-V ports), drivers, middleware (CAN stack, diagnostics, safety), applications, board support, build/test tooling, and documentation.
110 lines
3.0 KiB
C
110 lines
3.0 KiB
C
/**
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* @file spi_driver.h
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* @brief SPI driver interface
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*/
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#ifndef SPI_DRIVER_H
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#define SPI_DRIVER_H
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#include <stdint.h>
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#include <stdbool.h>
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#include "kernel.h"
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/* SPI Configuration Constants */
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#define SPI_MAX_INSTANCES 4
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#define SPI_MAX_BUFFER_SIZE 4096
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#define SPI_MAX_TRANSFER_SIZE 65535
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/* SPI Modes */
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typedef enum {
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SPI_MODE_0 = 0, /* CPOL=0, CPHA=0 */
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SPI_MODE_1 = 1, /* CPOL=0, CPHA=1 */
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SPI_MODE_2 = 2, /* CPOL=1, CPHA=0 */
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SPI_MODE_3 = 3 /* CPOL=1, CPHA=1 */
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} SpiMode_t;
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/* SPI Clock Speeds */
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typedef enum {
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SPI_CLOCK_1MHZ = 1000000,
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SPI_CLOCK_2MHZ = 2000000,
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SPI_CLOCK_4MHZ = 4000000,
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SPI_CLOCK_8MHZ = 8000000,
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SPI_CLOCK_16MHZ = 16000000,
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SPI_CLOCK_32MHZ = 32000000
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} SpiClockSpeed_t;
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/* SPI Data Order */
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typedef enum {
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SPI_DATA_ORDER_MSB_FIRST = 0,
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SPI_DATA_ORDER_LSB_FIRST = 1
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} SpiDataOrder_t;
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/* SPI Chip Select */
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typedef enum {
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SPI_CS_ACTIVE_LOW = 0,
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SPI_CS_ACTIVE_HIGH = 1
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} SpiChipSelectPolarity_t;
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/* SPI Transfer Status */
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typedef enum {
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SPI_TRANSFER_COMPLETE = 0,
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SPI_TRANSFER_ERROR = 1,
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SPI_TRANSFER_TIMEOUT = 2,
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SPI_TRANSFER_DMA_COMPLETE = 3
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} SpiTransferStatus_t;
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/* SPI Callbacks */
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typedef void (*SpiTransferCompleteCallback_t)(SpiTransferStatus_t status, void* user_data);
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/* SPI Configuration */
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typedef struct {
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SpiMode_t mode;
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SpiClockSpeed_t clock_speed;
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SpiDataOrder_t data_order;
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uint8_t data_size; /* 8 or 16 bits */
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bool use_dma;
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bool enable_hardware_cs;
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SpiChipSelectPolarity_t cs_polarity;
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uint8_t cs_port;
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uint8_t cs_pin;
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SpiTransferCompleteCallback_t transfer_complete_callback;
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} SpiConfig_t;
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/* SPI Statistics */
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typedef struct {
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uint32_t transfers_completed;
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uint32_t transfers_failed;
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uint32_t bytes_transferred;
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uint32_t dma_transfers;
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uint32_t overrun_errors;
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uint32_t underrun_errors;
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uint32_t timeout_errors;
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} SpiStatistics_t;
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/* SPI Transaction */
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typedef struct {
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const uint8_t* tx_data;
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uint8_t* rx_data;
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uint16_t length;
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bool keep_cs_active;
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void* user_data;
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} SpiTransaction_t;
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/* SPI Driver Interface */
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KernelStatus_t spi_init(uint8_t instance, SpiConfig_t* config);
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KernelStatus_t spi_deinit(uint8_t instance);
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KernelStatus_t spi_transfer(uint8_t instance, const SpiTransaction_t* transaction,
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uint32_t timeout_ms);
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KernelStatus_t spi_transfer_async(uint8_t instance, const SpiTransaction_t* transaction);
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KernelStatus_t spi_read(uint8_t instance, uint8_t* data, uint16_t length,
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uint32_t timeout_ms);
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KernelStatus_t spi_write(uint8_t instance, const uint8_t* data, uint16_t length,
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uint32_t timeout_ms);
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KernelStatus_t spi_read_write(uint8_t instance, const uint8_t* tx_data,
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uint8_t* rx_data, uint16_t length, uint32_t timeout_ms);
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KernelStatus_t spi_get_statistics(uint8_t instance, SpiStatistics_t* stats);
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void spi_set_chip_select(uint8_t instance, bool active);
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void spi_process_interrupt(uint8_t instance);
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#endif /* SPI_DRIVER_H */
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