/**
 * @file stm32f4xx_config.h
 * @brief STM32F4 specific configuration
 */

#ifndef STM32F4XX_CONFIG_H
#define STM32F4XX_CONFIG_H

/* MCU Specific Definitions */
#define STM32F407xx
#define HSE_VALUE                8000000U   /* External crystal */
#define HSI_VALUE                16000000U  /* Internal oscillator */
#define LSE_VALUE                32768U     /* Low speed external */
#define LSI_VALUE                32000U     /* Low speed internal */

/* Clock Configuration */
#define SYSTEM_CLOCK             168000000U /* 168 MHz */
#define AHB_CLOCK                168000000U
#define APB1_CLOCK               42000000U  /* 42 MHz */
#define APB2_CLOCK               84000000U  /* 84 MHz */

/* Peripheral Base Addresses */
#define GPIOA_BASE              0x40020000U
#define GPIOB_BASE              0x40020400U
#define GPIOC_BASE              0x40020800U
#define GPIOD_BASE              0x40020C00U
#define GPIOE_BASE              0x40021000U
#define GPIOF_BASE              0x40021400U
#define GPIOG_BASE              0x40021800U
#define GPIOH_BASE              0x40021C00U

#define USART1_BASE             0x40011000U
#define USART2_BASE             0x40004400U
#define USART3_BASE             0x40004800U
#define UART4_BASE              0x40004C00U
#define UART5_BASE              0x40005000U
#define USART6_BASE             0x40011400U

#define SPI1_BASE               0x40013000U
#define SPI2_BASE               0x40003800U
#define SPI3_BASE               0x40003C00U

#define I2C1_BASE               0x40005400U
#define I2C2_BASE               0x40005800U
#define I2C3_BASE               0x40005C00U

#define ADC1_BASE               0x40012000U
#define ADC2_BASE               0x40012100U
#define ADC3_BASE               0x40012200U

#define TIM1_BASE               0x40010000U
#define TIM2_BASE               0x40000000U
#define TIM3_BASE               0x40000400U
#define TIM4_BASE               0x40000800U
#define TIM5_BASE               0x40000C00U
#define TIM8_BASE               0x40010400U
#define TIM9_BASE               0x40014000U
#define TIM10_BASE              0x40014400U
#define TIM11_BASE              0x40014800U
#define TIM12_BASE              0x40001800U
#define TIM13_BASE              0x40001C00U
#define TIM14_BASE              0x40002000U

#define CAN1_BASE               0x40006400U
#define CAN2_BASE               0x40006800U

/* NVIC Priority Configuration */
#define CAN1_IRQ_PRIORITY       5
#define CAN2_IRQ_PRIORITY       5
#define USART1_IRQ_PRIORITY     6
#define USART2_IRQ_PRIORITY     6
#define USART3_IRQ_PRIORITY     6
#define SPI1_IRQ_PRIORITY       7
#define SPI2_IRQ_PRIORITY       7
#define I2C1_IRQ_PRIORITY       7
#define I2C2_IRQ_PRIORITY       7
#define ADC_IRQ_PRIORITY        8
#define TIM_IRQ_PRIORITY        8

/* DMA Configuration */
#define DMA1_STREAM0_CHANNEL    0
#define DMA1_STREAM1_CHANNEL    1
#define DMA1_STREAM2_CHANNEL    2
#define DMA1_STREAM3_CHANNEL    3
#define DMA1_STREAM4_CHANNEL    4
#define DMA1_STREAM5_CHANNEL    5
#define DMA1_STREAM6_CHANNEL    6
#define DMA1_STREAM7_CHANNEL    7

#define DMA2_STREAM0_CHANNEL    0
#define DMA2_STREAM1_CHANNEL    1
#define DMA2_STREAM2_CHANNEL    2
#define DMA2_STREAM3_CHANNEL    3
#define DMA2_STREAM4_CHANNEL    4
#define DMA2_STREAM5_CHANNEL    5
#define DMA2_STREAM6_CHANNEL    6
#define DMA2_STREAM7_CHANNEL    7

/* GPIO Alternate Function Mapping */
#define GPIO_AF_UART1_TX        7
#define GPIO_AF_UART1_RX        7
#define GPIO_AF_UART2_TX        7
#define GPIO_AF_UART2_RX        7
#define GPIO_AF_SPI1_SCK        5
#define GPIO_AF_SPI1_MOSI       5
#define GPIO_AF_SPI1_MISO       5
#define GPIO_AF_I2C1_SCL        4
#define GPIO_AF_I2C1_SDA        4
#define GPIO_AF_CAN1_TX         9
#define GPIO_AF_CAN1_RX         9
#define GPIO_AF_TIM1_CH1        1
#define GPIO_AF_TIM1_CH2        1
#define GPIO_AF_TIM1_CH3        1
#define GPIO_AF_TIM1_CH4        1

/* Memory Configuration */
#define FLASH_SIZE              0x100000U  /* 1 MB */
#define RAM_SIZE                0x20000U   /* 128 KB */
#define CCM_RAM_SIZE            0x10000U   /* 64 KB */

/* Safety Features */
#define ENABLE_CLOCK_SECURITY_SYSTEM  1
#define ENABLE_BROWN_OUT_RESET        1
#define BROWNOUT_THRESHOLD            0x08  /* 2.7V */

#endif /* STM32F4XX_CONFIG_H */