Add full automotive RTOS project
Add kernel (Cortex-M0/M3/M4, Tricore, S32K, RISC-V ports), drivers, middleware (CAN stack, diagnostics, safety), applications, board support, build/test tooling, and documentation.
This commit is contained in:
root
@@ -0,0 +1,114 @@
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/**
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* @file adc_driver.h
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* @brief ADC driver interface
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*/
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#ifndef ADC_DRIVER_H
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#define ADC_DRIVER_H
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#include <stdint.h>
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#include <stdbool.h>
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#include "kernel.h"
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/* ADC Configuration Constants */
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#define ADC_MAX_INSTANCES 3
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#define ADC_MAX_CHANNELS 16
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#define ADC_MAX_SEQUENCES 8
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/* ADC Resolution */
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typedef enum {
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ADC_RESOLUTION_6BIT = 6,
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ADC_RESOLUTION_8BIT = 8,
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ADC_RESOLUTION_10BIT = 10,
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ADC_RESOLUTION_12BIT = 12,
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ADC_RESOLUTION_14BIT = 14,
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ADC_RESOLUTION_16BIT = 16
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} AdcResolution_t;
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/* ADC Conversion Modes */
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typedef enum {
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ADC_MODE_SINGLE = 0,
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ADC_MODE_CONTINUOUS = 1,
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ADC_MODE_SCAN = 2,
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ADC_MODE_DISCONTINUOUS = 3
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} AdcConversionMode_t;
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/* ADC Trigger Sources */
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typedef enum {
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ADC_TRIGGER_SOFTWARE = 0,
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ADC_TRIGGER_TIMER = 1,
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ADC_TRIGGER_EXTERNAL = 2
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} AdcTriggerSource_t;
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/* ADC Reference Voltage */
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typedef enum {
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ADC_REFERENCE_INTERNAL = 0,
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ADC_REFERENCE_EXTERNAL = 1,
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ADC_REFERENCE_VDD = 2
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} AdcReference_t;
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/* ADC Sampling Time */
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typedef enum {
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ADC_SAMPLING_1_5_CYCLES = 0,
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ADC_SAMPLING_7_5_CYCLES = 1,
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ADC_SAMPLING_13_5_CYCLES = 2,
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ADC_SAMPLING_28_5_CYCLES = 3,
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ADC_SAMPLING_41_5_CYCLES = 4,
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ADC_SAMPLING_55_5_CYCLES = 5,
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ADC_SAMPLING_71_5_CYCLES = 6,
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ADC_SAMPLING_239_5_CYCLES = 7
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} AdcSamplingTime_t;
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/* ADC Callbacks */
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typedef void (*AdcConversionCompleteCallback_t)(uint16_t* values, uint8_t count);
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/* ADC Channel Configuration */
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typedef struct {
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uint8_t channel;
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AdcSamplingTime_t sampling_time;
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bool enable_watchdog;
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uint16_t watchdog_high_threshold;
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uint16_t watchdog_low_threshold;
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} AdcChannelConfig_t;
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/* ADC Configuration */
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typedef struct {
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AdcResolution_t resolution;
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AdcConversionMode_t mode;
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AdcTriggerSource_t trigger_source;
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AdcReference_t reference;
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bool enable_dma;
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uint32_t conversion_frequency;
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AdcChannelConfig_t channels[ADC_MAX_CHANNELS];
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uint8_t channel_count;
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AdcConversionCompleteCallback_t conversion_complete_callback;
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} AdcConfig_t;
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/* ADC Statistics */
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typedef struct {
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uint32_t conversions_completed;
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uint32_t conversions_failed;
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uint32_t watchdog_events;
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uint32_t overrun_errors;
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uint32_t dma_transfers;
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uint32_t average_conversion_time_us;
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} AdcStatistics_t;
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/* ADC Driver Interface */
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KernelStatus_t adc_init(uint8_t instance, AdcConfig_t* config);
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KernelStatus_t adc_deinit(uint8_t instance);
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KernelStatus_t adc_start_conversion(uint8_t instance);
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KernelStatus_t adc_stop_conversion(uint8_t instance);
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KernelStatus_t adc_read_channel(uint8_t instance, uint8_t channel, uint16_t* value,
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uint32_t timeout_ms);
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KernelStatus_t adc_read_channels(uint8_t instance, uint16_t* values, uint8_t count,
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uint32_t timeout_ms);
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KernelStatus_t adc_start_dma(uint8_t instance, uint16_t* buffer, uint16_t length);
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KernelStatus_t adc_stop_dma(uint8_t instance);
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KernelStatus_t adc_calibrate(uint8_t instance);
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KernelStatus_t adc_get_statistics(uint8_t instance, AdcStatistics_t* stats);
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float adc_convert_to_voltage(uint16_t adc_value, AdcResolution_t resolution,
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float reference_voltage);
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void adc_process_interrupt(uint8_t instance);
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#endif /* ADC_DRIVER_H */
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/**
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* @file can_driver.h
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* @brief CAN (Controller Area Network) driver interface
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* @note Supports classical CAN and CAN FD
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*/
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#ifndef CAN_DRIVER_H
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#define CAN_DRIVER_H
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#include <stdint.h>
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#include <stdbool.h>
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#include "kernel.h"
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/* CAN Configuration Constants */
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#define CAN_MAX_MESSAGE_LENGTH 8 /* Classical CAN */
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#define CAN_FD_MAX_MESSAGE_LENGTH 64 /* CAN FD */
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#define CAN_MAX_FILTERS 32
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#define CAN_MAX_TX_MAILBOXES 3
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#define CAN_MAX_RX_FIFO_DEPTH 16
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/* CAN Baudrates */
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typedef enum {
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CAN_BAUD_125K = 125000,
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CAN_BAUD_250K = 250000,
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CAN_BAUD_500K = 500000,
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CAN_BAUD_1M = 1000000,
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CAN_FD_BAUD_2M = 2000000,
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CAN_FD_BAUD_5M = 5000000
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} CanBaudrate_t;
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/* CAN Message Types */
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typedef enum {
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CAN_FRAME_CLASSIC = 0,
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CAN_FRAME_FD = 1,
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CAN_FRAME_FD_BRS = 2 /* FD with Bit Rate Switch */
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} CanFrameType_t;
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/* CAN Frame Format */
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typedef enum {
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CAN_FORMAT_STANDARD = 0, /* 11-bit identifier */
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CAN_FORMAT_EXTENDED = 1 /* 29-bit identifier */
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} CanFrameFormat_t;
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/* CAN Message ID */
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typedef struct {
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uint32_t id : 29;
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CanFrameFormat_t format : 1;
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bool is_remote : 1;
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bool is_extended : 1;
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} CanMessageId_t;
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/* CAN Message Structure */
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typedef struct {
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CanMessageId_t id;
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CanFrameType_t type;
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uint8_t data[CAN_FD_MAX_MESSAGE_LENGTH];
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uint8_t length;
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uint32_t timestamp;
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bool is_rx;
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} CanMessage_t;
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/* CAN Filter Configuration */
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typedef struct {
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uint32_t filter_id;
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uint32_t filter_mask;
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CanFrameFormat_t format;
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bool enable;
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} CanFilterConfig_t;
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/* CAN Statistics */
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typedef struct {
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uint32_t tx_messages;
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uint32_t rx_messages;
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uint32_t tx_errors;
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uint32_t rx_errors;
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uint32_t bus_off_count;
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uint32_t error_warning_count;
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uint32_t error_passive_count;
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uint32_t tx_overflow;
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uint32_t rx_overflow;
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} CanStatistics_t;
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/* CAN Callbacks */
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typedef void (*CanRxCallback_t)(const CanMessage_t* message);
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typedef void (*CanTxCallback_t)(uint32_t mailbox, bool success);
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typedef void (*CanErrorCallback_t)(uint32_t error_code);
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/* CAN Configuration Structure */
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typedef struct {
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CanBaudrate_t nominal_baudrate;
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CanBaudrate_t data_baudrate; /* For CAN FD */
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CanFrameType_t frame_type;
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bool enable_fd;
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bool enable_automatic_retransmission;
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CanFilterConfig_t filters[CAN_MAX_FILTERS];
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uint8_t filter_count;
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CanRxCallback_t rx_callback;
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CanTxCallback_t tx_callback;
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CanErrorCallback_t error_callback;
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} CanConfig_t;
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/* CAN Driver Interface */
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KernelStatus_t can_init(CanConfig_t* config);
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KernelStatus_t can_deinit(void);
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KernelStatus_t can_send_message(const CanMessage_t* message, uint32_t timeout_ms);
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KernelStatus_t can_receive_message(CanMessage_t* message, uint32_t timeout_ms);
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KernelStatus_t can_configure_filter(const CanFilterConfig_t* filter);
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KernelStatus_t can_set_baudrate(CanBaudrate_t baudrate);
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KernelStatus_t can_get_statistics(CanStatistics_t* stats);
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KernelStatus_t can_clear_statistics(void);
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bool can_is_bus_off(void);
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KernelStatus_t can_recover_bus_off(void);
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void can_process_interrupt(void);
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/* CAN FD Specific Functions */
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KernelStatus_t can_fd_set_data_baudrate(CanBaudrate_t baudrate);
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KernelStatus_t can_fd_set_transmit_delay(uint16_t delay_us);
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bool can_fd_is_enabled(void);
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#endif /* CAN_DRIVER_H */
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/**
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* @file gpio_driver.h
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* @brief GPIO driver interface
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*/
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#ifndef GPIO_DRIVER_H
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#define GPIO_DRIVER_H
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#include <stdint.h>
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#include <stdbool.h>
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#include "kernel.h"
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/* GPIO Configuration Constants */
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#define GPIO_MAX_PORTS 8
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#define GPIO_MAX_PINS_PER_PORT 16
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#define GPIO_MAX_INTERRUPTS 32
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/* GPIO Modes */
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typedef enum {
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GPIO_MODE_INPUT = 0,
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GPIO_MODE_OUTPUT = 1,
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GPIO_MODE_ALTERNATE = 2,
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GPIO_MODE_ANALOG = 3
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} GpioMode_t;
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/* GPIO Output Types */
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typedef enum {
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GPIO_OUTPUT_PUSH_PULL = 0,
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GPIO_OUTPUT_OPEN_DRAIN = 1
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} GpioOutputType_t;
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/* GPIO Pull Configuration */
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typedef enum {
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GPIO_PULL_NONE = 0,
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GPIO_PULL_UP = 1,
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GPIO_PULL_DOWN = 2
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} GpioPull_t;
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/* GPIO Speed */
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typedef enum {
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GPIO_SPEED_LOW = 0,
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GPIO_SPEED_MEDIUM = 1,
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GPIO_SPEED_HIGH = 2,
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GPIO_SPEED_VERY_HIGH = 3
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} GpioSpeed_t;
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/* GPIO Alternate Functions */
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typedef enum {
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GPIO_AF0 = 0,
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GPIO_AF1 = 1,
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GPIO_AF2 = 2,
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GPIO_AF3 = 3,
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GPIO_AF4 = 4,
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GPIO_AF5 = 5,
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GPIO_AF6 = 6,
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GPIO_AF7 = 7,
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GPIO_AF8 = 8,
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GPIO_AF9 = 9,
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GPIO_AF10 = 10,
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GPIO_AF11 = 11,
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GPIO_AF12 = 12,
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GPIO_AF13 = 13,
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GPIO_AF14 = 14,
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GPIO_AF15 = 15
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} GpioAlternateFunction_t;
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/* GPIO Interrupt Triggers */
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typedef enum {
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GPIO_INTERRUPT_NONE = 0,
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GPIO_INTERRUPT_RISING = 1,
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GPIO_INTERRUPT_FALLING = 2,
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GPIO_INTERRUPT_BOTH = 3
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} GpioInterruptTrigger_t;
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/* GPIO Pin Configuration */
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typedef struct {
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uint8_t port;
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uint8_t pin;
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GpioMode_t mode;
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GpioOutputType_t output_type;
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GpioPull_t pull;
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GpioSpeed_t speed;
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GpioAlternateFunction_t alternate_function;
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} GpioPinConfig_t;
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/* GPIO Interrupt Configuration */
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typedef struct {
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uint8_t port;
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uint8_t pin;
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GpioInterruptTrigger_t trigger;
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void (*callback)(uint8_t port, uint8_t pin);
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} GpioInterruptConfig_t;
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/* GPIO Driver Interface */
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KernelStatus_t gpio_init(const GpioPinConfig_t* config);
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KernelStatus_t gpio_deinit(uint8_t port, uint8_t pin);
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KernelStatus_t gpio_set_mode(uint8_t port, uint8_t pin, GpioMode_t mode);
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KernelStatus_t gpio_set_output_type(uint8_t port, uint8_t pin, GpioOutputType_t type);
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KernelStatus_t gpio_set_pull(uint8_t port, uint8_t pin, GpioPull_t pull);
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KernelStatus_t gpio_set_speed(uint8_t port, uint8_t pin, GpioSpeed_t speed);
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KernelStatus_t gpio_set_alternate_function(uint8_t port, uint8_t pin,
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GpioAlternateFunction_t af);
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KernelStatus_t gpio_write(uint8_t port, uint8_t pin, bool value);
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KernelStatus_t gpio_write_port(uint8_t port, uint16_t value);
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bool gpio_read(uint8_t port, uint8_t pin);
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uint16_t gpio_read_port(uint8_t port);
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KernelStatus_t gpio_toggle(uint8_t port, uint8_t pin);
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KernelStatus_t gpio_configure_interrupt(const GpioInterruptConfig_t* config);
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KernelStatus_t gpio_enable_interrupt(uint8_t port, uint8_t pin);
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KernelStatus_t gpio_disable_interrupt(uint8_t port, uint8_t pin);
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void gpio_process_interrupt(uint8_t port);
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#endif /* GPIO_DRIVER_H */
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@@ -0,0 +1,101 @@
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/**
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* @file i2c_driver.h
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* @brief I2C driver interface
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*/
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#ifndef I2C_DRIVER_H
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#define I2C_DRIVER_H
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#include <stdint.h>
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#include <stdbool.h>
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#include "kernel.h"
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/* I2C Configuration Constants */
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#define I2C_MAX_INSTANCES 4
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#define I2C_MAX_BUFFER_SIZE 1024
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#define I2C_MAX_TRANSFER_SIZE 255
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/* I2C Speeds */
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typedef enum {
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I2C_SPEED_STANDARD = 100000, /* 100 kHz */
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I2C_SPEED_FAST = 400000, /* 400 kHz */
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I2C_SPEED_FAST_PLUS = 1000000, /* 1 MHz */
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I2C_SPEED_HIGH = 3400000 /* 3.4 MHz */
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} I2cSpeed_t;
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/* I2C Addressing Mode */
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typedef enum {
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I2C_ADDRESSING_7BIT = 0,
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I2C_ADDRESSING_10BIT = 1
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} I2cAddressingMode_t;
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/* I2C Transfer Direction */
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typedef enum {
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I2C_DIRECTION_WRITE = 0,
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I2C_DIRECTION_READ = 1
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} I2cDirection_t;
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/* I2C Transfer Status */
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typedef enum {
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I2C_TRANSFER_COMPLETE = 0,
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I2C_TRANSFER_ERROR = 1,
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I2C_TRANSFER_NACK = 2,
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I2C_TRANSFER_TIMEOUT = 3,
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I2C_TRANSFER_ARBITRATION_LOST = 4,
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I2C_TRANSFER_BUS_ERROR = 5
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} I2cTransferStatus_t;
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/* I2C Callbacks */
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typedef void (*I2cTransferCompleteCallback_t)(I2cTransferStatus_t status, void* user_data);
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/* I2C Configuration */
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typedef struct {
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I2cSpeed_t speed;
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I2cAddressingMode_t addressing_mode;
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uint16_t own_address;
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bool enable_general_call;
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bool enable_clock_stretching;
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bool use_dma;
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I2cTransferCompleteCallback_t transfer_complete_callback;
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} I2cConfig_t;
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/* I2C Message */
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typedef struct {
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uint16_t slave_address;
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I2cDirection_t direction;
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uint8_t* data;
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uint16_t length;
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bool generate_stop;
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bool generate_restart;
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} I2cMessage_t;
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/* I2C Statistics */
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typedef struct {
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uint32_t transfers_completed;
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uint32_t transfers_failed;
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uint32_t nack_errors;
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uint32_t arbitration_lost;
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uint32_t bus_errors;
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uint32_t timeout_errors;
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uint32_t bytes_transferred;
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} I2cStatistics_t;
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/* I2C Driver Interface */
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KernelStatus_t i2c_init(uint8_t instance, I2cConfig_t* config);
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KernelStatus_t i2c_deinit(uint8_t instance);
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KernelStatus_t i2c_transfer(uint8_t instance, const I2cMessage_t* message,
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uint32_t timeout_ms);
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KernelStatus_t i2c_transfer_async(uint8_t instance, const I2cMessage_t* message);
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KernelStatus_t i2c_write(uint8_t instance, uint16_t slave_address,
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const uint8_t* data, uint16_t length, uint32_t timeout_ms);
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KernelStatus_t i2c_read(uint8_t instance, uint16_t slave_address,
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uint8_t* data, uint16_t length, uint32_t timeout_ms);
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KernelStatus_t i2c_write_read(uint8_t instance, uint16_t slave_address,
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const uint8_t* tx_data, uint16_t tx_length,
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uint8_t* rx_data, uint16_t rx_length,
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uint32_t timeout_ms);
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KernelStatus_t i2c_get_statistics(uint8_t instance, I2cStatistics_t* stats);
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bool i2c_is_device_ready(uint8_t instance, uint16_t slave_address);
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void i2c_process_interrupt(uint8_t instance);
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#endif /* I2C_DRIVER_H */
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@@ -0,0 +1,105 @@
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/**
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* @file pwm_driver.h
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* @brief PWM driver interface
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*/
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|
||||
#ifndef PWM_DRIVER_H
|
||||
#define PWM_DRIVER_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "kernel.h"
|
||||
|
||||
/* PWM Configuration Constants */
|
||||
#define PWM_MAX_INSTANCES 8
|
||||
#define PWM_MAX_CHANNELS 4
|
||||
#define PWM_MAX_DUTY_CYCLE 10000 /* 100.00% in 0.01% steps */
|
||||
|
||||
/* PWM Alignment Modes */
|
||||
typedef enum {
|
||||
PWM_ALIGNMENT_EDGE = 0,
|
||||
PWM_ALIGNMENT_CENTER = 1
|
||||
} PwmAlignment_t;
|
||||
|
||||
/* PWM Polarity */
|
||||
typedef enum {
|
||||
PWM_POLARITY_ACTIVE_HIGH = 0,
|
||||
PWM_POLARITY_ACTIVE_LOW = 1
|
||||
} PwmPolarity_t;
|
||||
|
||||
/* PWM Modes */
|
||||
typedef enum {
|
||||
PWM_MODE_NORMAL = 0,
|
||||
PWM_MODE_COMPLEMENTARY = 1,
|
||||
PWM_MODE_COMBINED = 2
|
||||
} PwmMode_t;
|
||||
|
||||
/* PWM Dead Time */
|
||||
typedef struct {
|
||||
uint16_t rising_edge_delay_ns;
|
||||
uint16_t falling_edge_delay_ns;
|
||||
} PwmDeadTime_t;
|
||||
|
||||
/* PWM Fault Actions */
|
||||
typedef enum {
|
||||
PWM_FAULT_DISABLE = 0,
|
||||
PWM_FAULT_ENABLE = 1,
|
||||
PWM_FAULT_HIGH_Z = 2
|
||||
} PwmFaultAction_t;
|
||||
|
||||
/* PWM Callbacks */
|
||||
typedef void (*PwmPeriodElapsedCallback_t)(uint8_t instance);
|
||||
typedef void (*PwmFaultCallback_t)(uint8_t instance, uint32_t fault_flags);
|
||||
|
||||
/* PWM Channel Configuration */
|
||||
typedef struct {
|
||||
uint8_t channel;
|
||||
uint32_t duty_cycle; /* 0 to PWM_MAX_DUTY_CYCLE */
|
||||
PwmPolarity_t polarity;
|
||||
PwmMode_t mode;
|
||||
PwmDeadTime_t dead_time;
|
||||
} PwmChannelConfig_t;
|
||||
|
||||
/* PWM Configuration */
|
||||
typedef struct {
|
||||
uint32_t frequency_hz;
|
||||
PwmAlignment_t alignment;
|
||||
uint32_t period_ticks;
|
||||
uint8_t prescaler;
|
||||
PwmChannelConfig_t channels[PWM_MAX_CHANNELS];
|
||||
uint8_t channel_count;
|
||||
bool enable_fault_protection;
|
||||
PwmFaultAction_t fault_action;
|
||||
PwmPeriodElapsedCallback_t period_elapsed_callback;
|
||||
PwmFaultCallback_t fault_callback;
|
||||
} PwmConfig_t;
|
||||
|
||||
/* PWM Statistics */
|
||||
typedef struct {
|
||||
uint32_t period_elapsed_count;
|
||||
uint32_t fault_events;
|
||||
uint32_t duty_cycle_updates;
|
||||
uint32_t overcurrent_events;
|
||||
uint32_t overvoltage_events;
|
||||
} PwmStatistics_t;
|
||||
|
||||
/* PWM Driver Interface */
|
||||
KernelStatus_t pwm_init(uint8_t instance, PwmConfig_t* config);
|
||||
KernelStatus_t pwm_deinit(uint8_t instance);
|
||||
KernelStatus_t pwm_start(uint8_t instance);
|
||||
KernelStatus_t pwm_stop(uint8_t instance);
|
||||
KernelStatus_t pwm_set_duty_cycle(uint8_t instance, uint8_t channel, uint32_t duty_cycle);
|
||||
KernelStatus_t pwm_set_frequency(uint8_t instance, uint32_t frequency_hz);
|
||||
KernelStatus_t pwm_set_period(uint8_t instance, uint32_t period_ticks);
|
||||
KernelStatus_t pwm_set_dead_time(uint8_t instance, uint8_t channel,
|
||||
const PwmDeadTime_t* dead_time);
|
||||
KernelStatus_t pwm_enable_channel(uint8_t instance, uint8_t channel);
|
||||
KernelStatus_t pwm_disable_channel(uint8_t instance, uint8_t channel);
|
||||
KernelStatus_t pwm_configure_fault(uint8_t instance, PwmFaultAction_t action);
|
||||
KernelStatus_t pwm_clear_fault(uint8_t instance);
|
||||
KernelStatus_t pwm_get_statistics(uint8_t instance, PwmStatistics_t* stats);
|
||||
uint32_t pwm_get_duty_cycle(uint8_t instance, uint8_t channel);
|
||||
uint32_t pwm_get_frequency(uint8_t instance);
|
||||
void pwm_process_interrupt(uint8_t instance);
|
||||
|
||||
#endif /* PWM_DRIVER_H */
|
||||
@@ -0,0 +1,109 @@
|
||||
/**
|
||||
* @file spi_driver.h
|
||||
* @brief SPI driver interface
|
||||
*/
|
||||
|
||||
#ifndef SPI_DRIVER_H
|
||||
#define SPI_DRIVER_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "kernel.h"
|
||||
|
||||
/* SPI Configuration Constants */
|
||||
#define SPI_MAX_INSTANCES 4
|
||||
#define SPI_MAX_BUFFER_SIZE 4096
|
||||
#define SPI_MAX_TRANSFER_SIZE 65535
|
||||
|
||||
/* SPI Modes */
|
||||
typedef enum {
|
||||
SPI_MODE_0 = 0, /* CPOL=0, CPHA=0 */
|
||||
SPI_MODE_1 = 1, /* CPOL=0, CPHA=1 */
|
||||
SPI_MODE_2 = 2, /* CPOL=1, CPHA=0 */
|
||||
SPI_MODE_3 = 3 /* CPOL=1, CPHA=1 */
|
||||
} SpiMode_t;
|
||||
|
||||
/* SPI Clock Speeds */
|
||||
typedef enum {
|
||||
SPI_CLOCK_1MHZ = 1000000,
|
||||
SPI_CLOCK_2MHZ = 2000000,
|
||||
SPI_CLOCK_4MHZ = 4000000,
|
||||
SPI_CLOCK_8MHZ = 8000000,
|
||||
SPI_CLOCK_16MHZ = 16000000,
|
||||
SPI_CLOCK_32MHZ = 32000000
|
||||
} SpiClockSpeed_t;
|
||||
|
||||
/* SPI Data Order */
|
||||
typedef enum {
|
||||
SPI_DATA_ORDER_MSB_FIRST = 0,
|
||||
SPI_DATA_ORDER_LSB_FIRST = 1
|
||||
} SpiDataOrder_t;
|
||||
|
||||
/* SPI Chip Select */
|
||||
typedef enum {
|
||||
SPI_CS_ACTIVE_LOW = 0,
|
||||
SPI_CS_ACTIVE_HIGH = 1
|
||||
} SpiChipSelectPolarity_t;
|
||||
|
||||
/* SPI Transfer Status */
|
||||
typedef enum {
|
||||
SPI_TRANSFER_COMPLETE = 0,
|
||||
SPI_TRANSFER_ERROR = 1,
|
||||
SPI_TRANSFER_TIMEOUT = 2,
|
||||
SPI_TRANSFER_DMA_COMPLETE = 3
|
||||
} SpiTransferStatus_t;
|
||||
|
||||
/* SPI Callbacks */
|
||||
typedef void (*SpiTransferCompleteCallback_t)(SpiTransferStatus_t status, void* user_data);
|
||||
|
||||
/* SPI Configuration */
|
||||
typedef struct {
|
||||
SpiMode_t mode;
|
||||
SpiClockSpeed_t clock_speed;
|
||||
SpiDataOrder_t data_order;
|
||||
uint8_t data_size; /* 8 or 16 bits */
|
||||
bool use_dma;
|
||||
bool enable_hardware_cs;
|
||||
SpiChipSelectPolarity_t cs_polarity;
|
||||
uint8_t cs_port;
|
||||
uint8_t cs_pin;
|
||||
SpiTransferCompleteCallback_t transfer_complete_callback;
|
||||
} SpiConfig_t;
|
||||
|
||||
/* SPI Statistics */
|
||||
typedef struct {
|
||||
uint32_t transfers_completed;
|
||||
uint32_t transfers_failed;
|
||||
uint32_t bytes_transferred;
|
||||
uint32_t dma_transfers;
|
||||
uint32_t overrun_errors;
|
||||
uint32_t underrun_errors;
|
||||
uint32_t timeout_errors;
|
||||
} SpiStatistics_t;
|
||||
|
||||
/* SPI Transaction */
|
||||
typedef struct {
|
||||
const uint8_t* tx_data;
|
||||
uint8_t* rx_data;
|
||||
uint16_t length;
|
||||
bool keep_cs_active;
|
||||
void* user_data;
|
||||
} SpiTransaction_t;
|
||||
|
||||
/* SPI Driver Interface */
|
||||
KernelStatus_t spi_init(uint8_t instance, SpiConfig_t* config);
|
||||
KernelStatus_t spi_deinit(uint8_t instance);
|
||||
KernelStatus_t spi_transfer(uint8_t instance, const SpiTransaction_t* transaction,
|
||||
uint32_t timeout_ms);
|
||||
KernelStatus_t spi_transfer_async(uint8_t instance, const SpiTransaction_t* transaction);
|
||||
KernelStatus_t spi_read(uint8_t instance, uint8_t* data, uint16_t length,
|
||||
uint32_t timeout_ms);
|
||||
KernelStatus_t spi_write(uint8_t instance, const uint8_t* data, uint16_t length,
|
||||
uint32_t timeout_ms);
|
||||
KernelStatus_t spi_read_write(uint8_t instance, const uint8_t* tx_data,
|
||||
uint8_t* rx_data, uint16_t length, uint32_t timeout_ms);
|
||||
KernelStatus_t spi_get_statistics(uint8_t instance, SpiStatistics_t* stats);
|
||||
void spi_set_chip_select(uint8_t instance, bool active);
|
||||
void spi_process_interrupt(uint8_t instance);
|
||||
|
||||
#endif /* SPI_DRIVER_H */
|
||||
@@ -0,0 +1,107 @@
|
||||
/**
|
||||
* @file uart_driver.h
|
||||
* @brief UART driver interface
|
||||
*/
|
||||
|
||||
#ifndef UART_DRIVER_H
|
||||
#define UART_DRIVER_H
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include "kernel.h"
|
||||
|
||||
/* UART Configuration Constants */
|
||||
#define UART_MAX_INSTANCES 6
|
||||
#define UART_MAX_BUFFER_SIZE 2048
|
||||
#define UART_DEFAULT_BAUDRATE 115200
|
||||
|
||||
/* UART Baudrates */
|
||||
typedef enum {
|
||||
UART_BAUD_9600 = 9600,
|
||||
UART_BAUD_19200 = 19200,
|
||||
UART_BAUD_38400 = 38400,
|
||||
UART_BAUD_57600 = 57600,
|
||||
UART_BAUD_115200 = 115200,
|
||||
UART_BAUD_230400 = 230400,
|
||||
UART_BAUD_460800 = 460800,
|
||||
UART_BAUD_921600 = 921600
|
||||
} UartBaudrate_t;
|
||||
|
||||
/* UART Data Bits */
|
||||
typedef enum {
|
||||
UART_DATA_BITS_5 = 5,
|
||||
UART_DATA_BITS_6 = 6,
|
||||
UART_DATA_BITS_7 = 7,
|
||||
UART_DATA_BITS_8 = 8,
|
||||
UART_DATA_BITS_9 = 9
|
||||
} UartDataBits_t;
|
||||
|
||||
/* UART Stop Bits */
|
||||
typedef enum {
|
||||
UART_STOP_BITS_1 = 0,
|
||||
UART_STOP_BITS_1_5 = 1,
|
||||
UART_STOP_BITS_2 = 2
|
||||
} UartStopBits_t;
|
||||
|
||||
/* UART Parity */
|
||||
typedef enum {
|
||||
UART_PARITY_NONE = 0,
|
||||
UART_PARITY_EVEN = 1,
|
||||
UART_PARITY_ODD = 2
|
||||
} UartParity_t;
|
||||
|
||||
/* UART Flow Control */
|
||||
typedef enum {
|
||||
UART_FLOW_CONTROL_NONE = 0,
|
||||
UART_FLOW_CONTROL_RTS_CTS = 1,
|
||||
UART_FLOW_CONTROL_XON_XOFF = 2
|
||||
} UartFlowControl_t;
|
||||
|
||||
/* UART Callbacks */
|
||||
typedef void (*UartRxCallback_t)(uint8_t* data, uint16_t length);
|
||||
typedef void (*UartTxCallback_t)(void);
|
||||
typedef void (*UartErrorCallback_t)(uint32_t error);
|
||||
|
||||
/* UART Configuration */
|
||||
typedef struct {
|
||||
UartBaudrate_t baudrate;
|
||||
UartDataBits_t data_bits;
|
||||
UartStopBits_t stop_bits;
|
||||
UartParity_t parity;
|
||||
UartFlowControl_t flow_control;
|
||||
bool enable_rx;
|
||||
bool enable_tx;
|
||||
bool use_dma;
|
||||
UartRxCallback_t rx_callback;
|
||||
UartTxCallback_t tx_callback;
|
||||
UartErrorCallback_t error_callback;
|
||||
} UartConfig_t;
|
||||
|
||||
/* UART Statistics */
|
||||
typedef struct {
|
||||
uint32_t tx_bytes;
|
||||
uint32_t rx_bytes;
|
||||
uint32_t tx_errors;
|
||||
uint32_t rx_errors;
|
||||
uint32_t parity_errors;
|
||||
uint32_t framing_errors;
|
||||
uint32_t overrun_errors;
|
||||
uint32_t dma_transfers;
|
||||
} UartStatistics_t;
|
||||
|
||||
/* UART Driver Interface */
|
||||
KernelStatus_t uart_init(uint8_t instance, UartConfig_t* config);
|
||||
KernelStatus_t uart_deinit(uint8_t instance);
|
||||
KernelStatus_t uart_send(uint8_t instance, const uint8_t* data, uint16_t length,
|
||||
uint32_t timeout_ms);
|
||||
KernelStatus_t uart_receive(uint8_t instance, uint8_t* data, uint16_t length,
|
||||
uint32_t timeout_ms);
|
||||
KernelStatus_t uart_send_async(uint8_t instance, const uint8_t* data, uint16_t length);
|
||||
KernelStatus_t uart_receive_async(uint8_t instance, uint8_t* data, uint16_t length);
|
||||
KernelStatus_t uart_flush(uint8_t instance);
|
||||
KernelStatus_t uart_get_statistics(uint8_t instance, UartStatistics_t* stats);
|
||||
uint16_t uart_get_rx_count(uint8_t instance);
|
||||
uint16_t uart_get_tx_count(uint8_t instance);
|
||||
void uart_process_interrupt(uint8_t instance);
|
||||
|
||||
#endif /* UART_DRIVER_H */
|
||||
Reference in New Issue
Block a user