Add full automotive RTOS project

Add kernel (Cortex-M0/M3/M4, Tricore, S32K, RISC-V ports), drivers, middleware (CAN stack, diagnostics, safety), applications, board support, build/test tooling, and documentation.
2026-08-23 03:35:29 -04:00
parent f113bf0a05
commit ca13734bf0
151 changed files with 23945 additions and 0 deletions
@@ -0,0 +1,141 @@
+/**
+ * @file linker_script.ld
+ * @brief Linker script for NXP S32K144
+ */
+
+ENTRY(Reset_Handler)
+
+MEMORY
+{
+    FLASH (rx)      : ORIGIN = 0x00000000, LENGTH = 512K
+    SRAM_L (rwx)    : ORIGIN = 0x1FFF8000, LENGTH = 32K
+    SRAM_U (rwx)    : ORIGIN = 0x20000000, LENGTH = 28K
+}
+
+_estack = ORIGIN(SRAM_U) + LENGTH(SRAM_U);
+_min_stack_size = 0x400;
+_min_heap_size = 0x200;
+
+SECTIONS
+{
+    /* Interrupt Vector Table */
+    .isr_vector :
+    {
+        . = ALIGN(4);
+        KEEP(*(.isr_vector))
+        . = ALIGN(4);
+    } >FLASH
+
+    /* Program Code */
+    .text :
+    {
+        . = ALIGN(4);
+        *(.text)
+        *(.text*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.eh_frame)
+
+        KEEP(*(.init))
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        _etext = .;
+    } >FLASH
+
+    /* Constant Data */
+    .rodata :
+    {
+        . = ALIGN(4);
+        *(.rodata)
+        *(.rodata*)
+        . = ALIGN(4);
+    } >FLASH
+
+    /* ARM Extensions */
+    .ARM.extab :
+    {
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+    } >FLASH
+
+    .ARM :
+    {
+        __exidx_start = .;
+        *(.ARM.exidx*)
+        __exidx_end = .;
+    } >FLASH
+
+    /* Initialization Arrays */
+    .preinit_array :
+    {
+        PROVIDE_HIDDEN(__preinit_array_start = .);
+        KEEP(*(.preinit_array*))
+        PROVIDE_HIDDEN(__preinit_array_end = .);
+    } >FLASH
+
+    .init_array :
+    {
+        PROVIDE_HIDDEN(__init_array_start = .);
+        KEEP(*(SORT(.init_array.*)))
+        KEEP(*(.init_array*))
+        PROVIDE_HIDDEN(__init_array_end = .);
+    } >FLASH
+
+    .fini_array :
+    {
+        PROVIDE_HIDDEN(__fini_array_start = .);
+        KEEP(*(SORT(.fini_array.*)))
+        KEEP(*(.fini_array*))
+        PROVIDE_HIDDEN(__fini_array_end = .);
+    } >FLASH
+
+    /* Data Sections */
+    _sidata = LOADADDR(.data);
+
+    .data :
+    {
+        . = ALIGN(4);
+        _sdata = .;
+        *(.data)
+        *(.data*)
+
+        . = ALIGN(4);
+        _edata = .;
+    } >SRAM_L AT> FLASH
+
+    /* BSS Section */
+    .bss :
+    {
+        . = ALIGN(4);
+        _sbss = .;
+        __bss_start__ = _sbss;
+        *(.bss)
+        *(.bss*)
+        *(COMMON)
+
+        . = ALIGN(4);
+        _ebss = .;
+        __bss_end__ = _ebss;
+    } >SRAM_L
+
+    /* Heap and Stack */
+    ._user_heap_stack :
+    {
+        . = ALIGN(8);
+        PROVIDE(end = .);
+        PROVIDE(_end = .);
+        . = . + _min_heap_size;
+        . = . + _min_stack_size;
+        . = ALIGN(8);
+    } >SRAM_U
+
+    /* Discard */
+    /DISCARD/ :
+    {
+        libc.a(*)
+        libm.a(*)
+        libgcc.a(*)
+    }
+
+    .ARM.attributes 0 : { *(.ARM.attributes) }
+}